U631H16
25
35
45
Symbol
Unit
No. Software Controlled STORE/RECALL
Cyclel, n
Alt.
tAVAV
IEC
Min. Max. Min. Max. Min. Max.
25 STORE/RECALL Initiation Time
26 Chip Enable to Output Inactiveo
27 STORE Cycle Timep
tcR
25
35
45
ns
ns
ms
µs
ns
ns
ns
tELQZ tdis(E)SR
tELQXS td(E)S
tELQXR td(E)R
tAVELN tsu(A)SR
tELEHN tw(E)SR
tEHAXN th(A)SR
600
10
600
10
600
10
28 RECALL Cycle Timeq
20
20
20
29 Address Setup to Chip Enabler
30 Chip Enable Pulse Widthr, s
31 Chip Disable to Address Changer
0
20
0
0
25
0
0
35
0
n: The software sequence is clocked with E controlled READs.
o: Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
p: Note that STORE cycles (but not RECALL) are aborted by VCC < VSWITCH (STORE inhibit).
q: An automatic RECALL also takes place at power up, starting when VCC exceeds VSWITCH and takes tRESTORE. VCC must not drop below
VSWITCH once it has been exceeded for the RECALL to function properly.
r: Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
s: If the Chip Enable Pulse Width is less than ta(E) (see Read Cycle) but greater than or equal tw(E)SR, than the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
Software Controlled STORE/RECALL Cycler, s, t, u (E = HIGH after STORE initiation)
tcR
(25)
tcR
(25)
ADDRESS 6
ADDRESS 1
Ai
E
th(A)SR
(31)
tw(E)SR
(30)
tw(E)SR
(30)
t
dis(E)(5)
(31)
th(A)SR
tsu(A)SR
(29)
(29)
td(E)R
td(E)S
tsu(A)SR
(28)
(27)
DQi
High Impedance
VALID
tdis(E)SR
Output
VALID
(26)
Software Controlled STORE/RECALL Cycler, s, t, u (E = LOW after STORE initiation)
tcR
(25)
ADDRESS 1
tw(E)SR
ADDRESS 6
Ai
E
th(A)SR
(31)
(30)
(29)
(31)
(29)
tsu(A)SR
High Impedance
th(A)SR
td(E)S
td(E)R (28)
tsu(A)SR
(27)
DQi
VALID
Output
VALID
tdis(E)SR
(26)
t: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW
throughout. Addresses 1 through 6 are found in the mode selection table. Address 6 determines whether the U631H16 performs a STORE
or RECALL.
u: E must be used to clock in the address sequence for the Software controlled STORE and RECALL cycles.
8
April 20, 2004
CYPRESS [ CYPRESS ]
