PSoC® 3: CY8C32 Family
Data Sheet
Figure 2-5. Example Schematic for 100-pin TQFP Part with Power Connections
Vddd
Vddd
C1
1 uF
C2
0.1 uF
Vddd
Vccd
C6
0.1 uF
Vssd
Vssd
U2
CY8C55xx
Vssd
Vdda
Vddd
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
P2[5]
P2[6]
P2[7]
P12[4], SIO
P12[5], SIO
P6[4]
P6[5]
P6[6]
P6[7]
Vssb
Ind
Vboost
Vbat
Vssd
XRES
P5[0]
P5[1]
P5[2]
P5[3]
P1[0], SWIO, TMS
P1[1], SWDIO, TCK
P1[2]
P1[3], SWV, TDO
P1[4], TDI
P1[5], nTRST
Vddio0
OA0-, REF0, P0[3]
C8
0.1 uF
C17
1 uF
OA0+, P0[2]
OA0out, P0[1]
OA2out, P0[0]
P4[1]
Vssd
P4[0]
Vssa
Vdda
SIO, P12[3]
SIO, P12[2]
Vssd
Vssd
Vssd
Vdda
Vssa
Vcca
Vdda
Vssa
Vcca
NC
NC
NC
NC
NC
Vssd
Vssd
C9
1 uF
C10
0.1 uF
NC
Vssa
kHzXin, P15[3]
kHzXout, P15[2]
SIO, P12[1]
SIO, P12[0]
OA3out, P3[7]
OA1out, P3[6]
Vddd
Vddd
C11
0.1 uF
C12
0.1 uF
C13
10 uF, 6.3 V 0.1 uF Vssd
C14
C15
1 uF
Vssd
C16
0.1 uF
Vssa
Vssa
Vssd
Note The two Vccd pins must be connected together with as short a trace as possible. A trace under the device is recommended, as
shown in Figure 2-6 on page 10.
Document Number: 001-56955 Rev. *J
Page 9 of 119
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