PSoC® 3: CY8C32 Family
Data Sheet
Table 11-19. Delta-sigma ADC AC Specifications
Parameter
Description
Conditions
Min
–
Typ
–
Max
4
Units
Samples
%
Startup time
Total harmonic distortion[36]
THD
Buffer gain = 1, 16 bit,
Range = ±1.024 V
–
–
0.0032
12-Bit Resolution Mode
SR12
BW12
Sample rate, continuous, high power[36]
Input bandwidth at max sample rate[36]
Range = ±1.024 V, unbuffered
Range = ±1.024 V, unbuffered
Range = ±1.024 V, unbuffered
4
–
–
44
–
192
–
ksps
kHz
dB
SINAD12int Signal to noise ratio, 12-bit, internal
reference[36]
66
–
8-Bit Resolution Mode
SR8
Sample rate, continuous, high power[36]
Input bandwidth at max sample rate[36]
Range = ±1.024 V, unbuffered
Range = ±1.024 V, unbuffered
Range = ±1.024 V, unbuffered
8
–
–
88
–
384
–
ksps
kHz
dB
BW8
SINAD8int
Signal to noise ratio, 8-bit, internal
reference[36]
43
–
Table 11-20. Delta-sigma ADC Sample Rates, Range = ±1.024 V
Continuous
Multi-Sample
Resolution,
Bits
Min
Max
Min
Max
8
8000
6400
5566
4741
4000
384000
307200
267130
227555
192000
1911
1543
1348
1154
978
91701
74024
64673
55351
46900
9
10
11
12
Figure 11-25. Delta-sigma ADC IDD vs sps, Range = ±1.024 V,
Continuous Sample Mode, Input Buffer Bypassed
Note
36. Based on device characterization (Not production tested).
Document Number: 001-56955 Rev. *J
Page 80 of 119
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