PSoC® 3: CY8C32 Family
Data Sheet
Figure 4-3. Interrupt Structure
Interrupt Polling logic
Highest Priority
Interrupts form Fixed
function blocks, DMA and
UDBs
Interrupt Enable/
Disable, PEND and
POST logic
Interrupts 0 to 30
from UDBs
0
Interrupts 0 to 30
from Fixed
1
Function Blocks
IRQ
0 to 30
ACTIVE_INT_NUM
INT_VECT_ADDR
Individual
Enable Disable
bits
8 Level
Interrupt
routing logic
to select 31
sources
Interrupts 0 to
30 from DMA
Priority
decoder
for all
[15:0]
interrupts
IRA
IRC
30
Global Enable
disable bit
Lowest Priority
Document Number: 001-56955 Rev. *J
Page 20 of 119
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