PRELIMINARY
C9926
Low EMI Clock Generator for Intel 133MHz/ 2DIMM Chipset Systems
Power on Bi-Functional Pins (Cont.)
Pin 28 (TS#/PD#) is a bi-functional pin, See Fig.6. If this pin is externally held low during power up, the device is forced
into Tri-state/or test mode depending on the state of SEL0 (pg. 3).
In Tri-state mode, all outputs assume the high impedance (Hi-Z) state. In test, all outputs toggle as described in table 2,
p. 3.
All outputs remain in their Hi-Z state (or test mode) until the external signal applied to TS#/PD# is released (set high).
TS# should remain high for a minimum of 1.5mS after a stable 3.3V power supply. Then TS#/PD# changes from a Tri-
state controller (TS#) to Power Down controller (PD#) and remains in that function unless otherwise programmed
through the SMBus to return to the TS# function by setting Byte3, Bit1 to a “0”. Once the TS# signal is released (high),
TS#/PD# may be toggled repetitively to force the device in and out of power down mode.
The device is considered in power down when PD# is asserted low, consequently, all clocks are stopped synchronously
and after the completion of a full period (glitch-free).
3.3V
Power
Supply
1.5mS
TS# function
TS# asserted
low
TS# released
PD# asserted low
PD# released
TS#
ς
TS# function
Default High
PD#
ς
I2C,
Byte3,
Bit1
programmed Low
Toggle
Hi-Z
Hi-Z
Output
Clock
Power Down
ς
ς
Fig.6
Cypress Semiconductor Corporation
525 Los Coches St.
Document#: 38-07070 Rev. **
5/4/2001
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress
Page 7 of 21
CYPRESS [ CYPRESS ]
