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C9926AY 参数 Datasheet PDF下载

C9926AY图片预览
型号: C9926AY
PDF下载: 下载PDF文件 查看货源
内容描述: [Processor Specific Clock Generator, CMOS, PDSO48, SSOP-40]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 21 页 / 351 K
品牌: CYPRESS [ CYPRESS ]
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PRELIMINARY  
C9926  
Low EMI Clock Generator for Intel 133MHz/ 2DIMM Chipset Systems  
Serial Control Registers  
NOTE: The Pin# column lists the affected pin number where applicable. The @Pup column gives the state at true  
power up. Bytes are set to the values shown only on true power up.  
Following the acknowledge of the Address Byte, two additional bytes must be sent:  
1) “Command Code “ byte, and  
2) “Byte Count” byte.  
Although the data (bits) in these two bytes are considered “don’t care”; they must be sent and will be acknowledged.  
After the Command Code and the Count bytes have been acknowledged, the following sequence (Byte 0, Byte 1, and  
Byte2) will be valid and acknowledged.  
Byte 0: CPU Clock Register (1=Enable, 0=Disable)  
Byte 1: SDRAM Clock Register (1=Enable, 0=Disable)  
Bit  
7
6
5
4
@Pup  
Pin#  
Description  
Bit  
7
6
5
4
3
2
1
0
@Pup  
Pin#  
Description  
RESERVED (drive to “0”)  
RESERVED (drive to “0”)  
SDRAM5  
SDRAM4  
SDRAM3  
SDRAM2  
SDRAM1  
SDRAM0  
0
0
0
0
0
-
-
-
-
-
SEL3 frequency selector  
SEL2 frequency selector  
SEL1 frequency selector  
SEL0 frequency selector  
1 = Spread Spectrum Enabled  
0 = Spread Spectrum Disabled  
DOT  
1
1
1
1
1
1
1
1
-
-
-
-
-
-
-
-
3
2
1
0
1
1
0
27  
26  
-
USB  
High enables bit(7:4) selectors.  
Byte 3: Reserved Register  
Byte 2: SDRAM Clock Register (1=Enable, 0=Disable)  
Bit  
7
6
5
4
3
2
1
@Pup  
Pin#  
-
-
-
-
-
-
28  
Description  
RESERVED  
High puts the device in TEST mode.  
RESERVED  
RESERVED  
RESERVED  
RESERVED  
1 enables std. Functionality TS#/PD#  
0 enables TS# only  
0 = SDRAM runs at 100MHz  
1= SDRAM runs at 133.3MHz  
Bit  
7
@Pup  
Pin#  
10  
-
Description  
3V66-2  
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
6
5
4
3
2
1
0
RESERVED (drive to “0”)  
RESERVED (drive to “0”)  
SDRAM8  
SDRAM7  
SDRAM6  
-
29  
30  
31  
13  
-
PCI1  
RESERVED  
0
0
-
Byte 4: PCI Clock Register (1=Enable, 0=Disable)  
Byte 5: SSCG Control Register  
Bit  
7
@Pup  
Pin#  
-
-
Description  
RESERVED  
RESERVED  
RESERVED  
RESERVED (drive to “0”)  
RESERVED (drive to “0”)  
PCI4  
Bit  
7
@Pup  
Pin#  
Description  
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
Spread Mode (0=down, 1=center)  
Selects spread bandwidth. Ref. Table 4  
Selects spread bandwidth. Ref. Table 4  
RESERVED  
6
6
5
4
5
-
4
-
3
-
3
RESERVED  
2
1
0
18  
17  
14  
2
RESERVED  
PCI3  
PCI2  
1
RESERVED  
0
RESERVED  
Cypress Semiconductor Corporation  
525 Los Coches St.  
Document#: 38-07070 Rev. **  
5/4/2001  
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571  
http://www.cypress  
Page 9 of 21  
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