PRELIMINARY
CYW54907
17.5.3 Memory Fast-Read Timing
Figure 32 shows the SPI flash extended and quad memory fast-read timing.
Note: Regarding Figure 32:
1. 24-bit addressing is used, so A[MAX] = A[23] and A[MIN] = A[0].
2. For an extended SPI protocol, Cx = 7 + (A[MAX] + 1).
3. For a quad SPI protocol, Cx = 1 + (A[MAX] + 1)/4.
Figure 32. Memory Fast-Read Timing
0
7
8
Cx
Extended
C
A[MIN]
LSB
DQ0
DQ1
Command
High-Z
MSB
A[MAX]
LSB
DOUT
MSB
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
DOUT
Dummy Cycles
0
1
2
Cx
Quad
C
LSB
DOUT
A[MIN]
LSB
DQ[3:0]
Command
DOUT
MSB
DOUT
MSB
A[MAX]
Dummy Cycles
Don’t care
Document Number: 002-19312 Rev. *C
Page 84 of 95
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