PRELIMINARY
CYW54907
17.5.5 SPI Flash Parameters
The combination of Figure 34 and Table 53 provide the SPI flash timing parameters.
Figure 34. SPI Flash Timing Parameters Diagram
T_DVCH
Clock (C)
T_CHDX
Data in (DIN)
(DQ1 in Serial [Extended] mode)
(DQ[3:0] in Quad mode)
T_CLQX
Data out (DOUT
)
(DQ0 in Serial [Extended] mode)
(DQ[3:0] in Quad mode)
T_CLQV
Table 53. SPI Flash Timing Parameters
Parameter
Description
Minimum
Maximum
Units
ns
T_DVCH
T_CHDX
T_CLQX
T_CLQV
Data setup time
Data hold time
Output hold time
2
3
1
–
–
–
–
5
ns
ns
Output valid time (with a 10 pF load)
ns
17.6 USB PHY Electrical Characteristics and Timing
17.6.1 USB 2.0 and USB 1.1 Electrical and Timing Parameters
Table 54 provides electrical and timing parameters for USB 2.0.
Table 54. USB 2.0 Electrical and Timing Parameters
Parameter
Symbol Minimum
Typical
Maximum Units
Conditions
Baud rate
BPS
UI
–
–
480
–
–
Mbps
ps
–
–
Unit interval
2083
Receiver – HS Mode
Differential input voltage sensitivity
Input common mode voltage range
Receiver jitter tolerance
VHSDI
VHSCM
THSRX
RIN
300
–50
–
–
–
mV
mV
UI
Static | VIDP – VIDN
|
500
0.15
49.5
–
–0.15
40.5
–
–
Input impedance
45
Ω
Single ended
Transmitter – HS Mode
Output high voltage
Output low voltage
Output rise time
VHSOH
VHSOL
THSR
360
–10
500
400
0
440
10
–
mV
mV
ps
Static condition
Static condition
10% to 90%
–
Document Number: 002-19312 Rev. *C
Page 86 of 95
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