Bit 0:
DONE
I2C Transfer DONE
The I2C controller sets this bit whenever it completes a byte transfer, right after the ACK
stage. The controller also generates an I2C interrupt request (8051 INT3) when it sets the
DONE bit. The I2C controller automatically clears the DONE bit and the I2C interrupt
request bit whenever the 8051 reads or writes the I2DAT register.
I2C Mode
I2CMODE
7FA7
b7
b6
b5
b4
b3
b2
b1
b0
0
0
0
0
0
0
STOPIE
0
R
0
R
0
R
0
R
0
R
0
R
0
R/W
0
R
0
2
Figure 12-15. I C Mode Register
The I2C interrupt includes one additional interrupt source in the AN2122/AN2126, a 1-0
transition of the STOP bit. To enable this interrupt, set the STOPIE bit in the I2CMODE
register. The 8051 determines the interrupt source by checking the DONE and STOP bits
in the I2CS register.
Page 12-18
Chapter 12. EZ-USB Registers
EZ-USB TRM v1.9
CYPRESS [ CYPRESS ]
