RS8953B/8953SPB
3.0 Circuit Descriptions
HDSL Channel Unit
3.2 PCM Channel
3.2.2.3 BER Meter
PCM timeslots from TSER or RSER can be examined for test patterns on a per
timeslot-basis, or the entire framed or unframed PCM channel from TSER can be
examined (see PRBS_MODE in CMD_3; addr 0xE7 and BER_SEL in CMD_6;
addr 0xF3). When a test pattern is examined on a per timeslot-basis from receive
combination or transmit routing table assignments, the BER meter is only clocked
during enabled timeslots and expects a single test pattern to arrive in one
sequence from all enabled timeslots. The expected test pattern is selected from
one of four Pseudo-Random Bit Sequence (PRBS) patterns or a programmable
4
8-bit fixed pattern [FILL_PATT; addr 0xEA]. PRBS pattern selections are: 2 –1,
15
23
2 –1, 2 –1 and Quasi-Random Signal Sequence (QRSS), where QRSS equals
20
2 –1 PRBS with 14-zero limit. The MPU configures BER_SCALE [CMD_3;
21 31
addr 0xE7] to determine the test measurement interval from a range of 2 –2 bit
lengths, starts BER measurement by issuing BER_RST [addr 0xEF], then
monitors test results [BER_METER; addr 0x1D] and test status [BER_STATUS;
addr 0x1E].
Figure 3-12. PRBS/BER Measurements
BER_SEL = NORMAL
BER_SEL = PCM SERIAL
BER_SEL = PCM FRAMED
PCM
HDSL
TSER
BER
ROUTE_TBL
PRBS
TSER
RSER
BER
BER
PRBS
PRBS
ROUTE_TBL
COMBINE_TBL
HDSL
Test Selected HDSL Payload
Test Entire PCM Channel
Test Selected PCM Timeslots
N8953BDSB
Conexant
3-13