CX82100 Home Network Processor Data Sheet
5.2
Host Master Mode Register Memory Map
Host Master Mode registers are identified in Table 5-7.
Table 5-7. Host Master Mode Registers
Register Label
HST_CTRL
HST_RWST
Register Name
ASB Address
0x002D0000
0x002D0004
Type
RW
RW
Default Value
0x00000008
0x00739CE7
Ref.
5.3.1
5.3.2
Host Control Register
Host Master Mode Read-Wait-State Control
Register
HST_WWST
Host Master Mode Write-Wait-State Control
Register
0x002D0008
RW
0x00739CE7
5.3.3
HST_XFER_CNTL
HST_READ_CNTL1
HST_READ_CNTL2
HST_WRITE_CNTL1
HST_WRITE_CNTL2
MSTR_INTF_WIDTH
MSTR_HANDSHAKE
HDMA_SRC_ADDR
HDMA_DST_ADDR
HDMA_BCNT
Host Master Mode Transfer Control Register
Host Master Mode Read Control Register 1
Host Master Mode Read Control Register 2
Host Master Mode Write Control Register 1
Host Master Mode Write Control Register 2
Host Master Mode Peripheral Size
Host Master Mode Peripheral Handshake
Host Master Mode DMA Source Address
Host Master Mode DMA Destination Address 0x002D002C
0x002D000C
0x002D0010
0x002D0014
0x002D0018
0x002D001C
0x002D0020
0x002D0024
0x002D0028
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
Host Master Mode DMA Byte Count
Host Master Mode DMA Timers
0x002D0030
0x002D0034
HDMA_TIMERS
5-12
Conexant Proprietary and Confidential Information
101306C