CX82100 Home Network Processor Data Sheet
9.3.16
GPIO Interrupt Enable Register 3 for GPIO[39:37; 32] (GPIO_IER3: 0x003500EC)
GPIO_IER3 is the interrupt input enable register for GPIO[39:37; 32].
Note: If an interrupt input is enabled for GPIO[X], then GPIO[X] must be configured
as an input.
Bit(s)
31:24
23:16;
23≥Y≥16,
Y = Bit #
Type
Default
Name
Description
Reserved.
RO
See specific GPIO_IEMSK{X},
GPIO[X] Interrupt Enable Mask, 39≥X≥32.
bit
39≥X≥32,
X = Y+16.
Reading:
Return 0.
Writing:
0 to bit #Y = > Mask off the function associated with GPIO_IE{X}.
1 to bit #Y = > Enable the function associated with GPIO_IE{X}.
Reserved.
GPIO[X] Interrupt Enable, 39≥X≥32.
Reading:
15:8
7:0;
7≥Y≥0,
Y = Bit #
RW
See specific GPIO_IE{X},
bit
39≥X≥32,
X = Y+32.
Return the last value written to bit #Y.
Writing:
0 to bit #Y = > Disable the GPIO[X] interrupt if GPIO_IEMSK{X} =
1; don't care, otherwise.
1 to bit #Y = > Enable the GPIO[X] interrupt if GPIO_IEMSK{X} =
1; don't care, otherwise.
Bit(s)
31:24
23
22
21
20:17
16
15:8
7
6
5
Type
Default
Name
Description
Reserved.
GPIO39 Interrupt Enable Mask.
GPIO38 Interrupt Enable Mask.
GPIO37 Interrupt Enable Mask.
Reserved.
GPIO32 Interrupt Enable Mask.
Reserved.
GPIO39 Interrupt Enable.
GPIO38 Interrupt Enable.
GPIO37 Interrupt Enable.
Reserved.
RO
RO
RO
1’b0
1’b0
1’b0
GPIO_IEMSK39
GPIO_IEMSK38
GPIO_IEMSK37
RO
1’b0
GPIO_IEMSK32
RW
RW
RW
1’b0
1’b0
1’b0
GPIO_IE39
GPIO_IE38
GPIO_IE37
4:1
0
RW
1’b0
GPIO_IE32
GPIO32 Interrupt Enable.
101306C
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