CX82100 Home Network Processor Data Sheet
9.3.17
GPIO Interrupt Polarity Control Register 1 for GPIO[15:14; 8:5] (GPIO_IPC1:
0x003500F0)
GPIO_IPC1 is the interrupt polarity control register for GPIO[15:14; 8:5].
Bit(s)
31:16;
31≥Y≥16,
Y = Bit #
Type
RO
Default
Name
Description
GPIO[X] Interrupt Polarity Mask, 15≥X≥0.
See specific GPIO_IPMSK{X},
bit
15≥X≥0,
X = Y-16.
Reading:
Return 0.
Writing:
0 = Mask off the function associated with GPIO_IP{X}.
1 = Enable the function associated with GPIO_IP{X}.
GPIO[X] Interrupt Polarity Control, 15≥X≥0.
Reading:
Return the last value written to bit #Y.
Writing:
15:0;
15≥Y≥0,
Y = Bit #
RW
See specific GPIO_IP{X},
bit
15≥X≥0,
X = Y.
1 = For GPIO_IPMSK{X} = 1, interrupt will occur upon GPIO[X]
high or positive edge; for GPIO_IPMSK{X} = 0, interrupt will
not occur upon GPIO[X] high or positive edge.
0 = For GPIO_IPMSK{X} = 1, interrupt will occur upon GPIO[X]
low or negative edge; for GPIO_IPMSK{X} = 0, interrupt will
not occur upon GPIO[X] low or negative edge.
Bit(s)
31
30
29:25
24
23
22
21
20:16
15
14
13:9
8
7
6
5
Type
RO
RO
Default
1’b0
1’b0
Name
GPIO_IPMSK15
GPIO_IPMSK14
Description
GPIO15 Interrupt Polarity Mask.
GPIO14 Interrupt Polarity Mask.
Reserved.
GPIO8 Interrupt Polarity Mask.
GPIO7 Interrupt Polarity Mask.
GPIO6 Interrupt Polarity Mask.
GPIO5 Interrupt Polarity Mask.
Reserved.
GPIO15 Interrupt Polarity Control.
GPIO14 Interrupt Polarity Control.
Reserved.
GPIO8 Interrupt Polarity Control.
GPIO7 Interrupt Polarity Control.
GPIO6 Interrupt Polarity Control.
GPIO5 Interrupt Polarity Control.
Reserved.
RO
RO
RO
RO
1’b0
1’b0
1’b0
1’b0
GPIO_IPMSK8
GPIO_IPMSK7
GPIO_IPMSK6
GPIO_IPMSK5
RW
RW
1’b0
1’b0
GPIO_IP15
GPIO_IP14
RW
RW
RW
RW
1’b0
1’b0
1’b0
1’b0
GPIO_IP8
GPIO_IP7
GPIO_IP6
GPIO_IP5
4:0
9-16
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CONEXANT [ CONEXANT SYSTEMS, INC ]
