Bt8370/8375/8376
2.0 Circuit Description
2.4 Receiver
Fully Integrated T1/E1 Framer and Line Interface
Figure 2-13. Polled Receive Data Link Processing
Receive Message
Read Data Link Status
Wait N Milliseconds
Wait N Milliseconds
If
Yes
FIFO EMPTY
No
Read Message Byte from FIFO
and Discard
If
No
(Purge FIFO)
Message Status
on FIFO
Yes
Read Message Status from FIFO
Read X Message Bytes from FIFO
If
Yes
Message Status
is Continue
No
If
Yes
Message Status
is Good
Return
No
Error Receiving Message
Return
NOTE(S): Message status contains number of message bytes (X) in FIFO, where (X) equals 0 during idle channel or errored
message.
N8370DSE
Conexant
2-29