2.0 Circuit Description
2.5 Receive System Bus
Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
2.5 Receive System Bus
The Receive System Bus (RSB) provides a high-speed, serial interface between
the RCVR and the system bus. The system bus is compatible with the Mitel
ST-Bus, the Siemens PEB Bus, and the AT&T CHI Bus, and directly connects to
other CONEXANT serial TDM bus devices with no need for any external
circuitry.
The RSB has the following seven pins: Receive System Bus Clock (RSBCKI),
Receive PCM Data (RPCMO), Receive Signaling Data (RSIGO), Receive Frame
Sync (RFSYNC), Receive Multiframe Sync (RMSYNC), Receive Time Slot
Indicator (RINDO), and Signaling Freeze (SIGFRZ). Figure 2-15 illustrates the
relationship between these signals. (Pin definitions are provided in
Table 1-1, Hardware Signal Definitions.) RSB data outputs can be configured to
output on the rising or falling edge of RSBCKI. See the Receive System Bus
Configuration register [RSB_CR; addr 0D1].
Figure 2-15. RSB Waveforms
RSBCKI
Frame 48 TS 31
Frame 1 TS 0
RPCMO
RINDO
RSIGO
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
A
1
B
C
D
A
5
B
6
C
7
D
8
A
F
B
1
C
D
A
4
B
5
C
6
D
7
A
8
B
1
Frame 48 TS 24
Frame 1 TS 1
RPCMO
RINDO
RSIGO
2
3
4
2
3
A
B
C
D
A
B
C
D
X
A
B
C
D
A
B
C
D
A
SIGFRZ
RFSYNC
RMSYNC
NOTE(S): The Receive Multiframe Sync (RMSYNC) occurs every 6 ms for 48 T1 or 48 E1 frames.
2-32
Conexant
N8370DSE
CONEXANT [ CONEXANT SYSTEMS, INC ]
