Bt8370/8375/8376
3.0 Registers
Fully Integrated T1/E1 Framer and Line Interface
3.1 Address Map
Table 3-1. Address Map (5 of 8)
Default Register Setting
Address
(Hex)
Acronym
R/W
Description
Bt8370
Bt8375
Bt8376
070
071
072
073
074
TCR0
TCR1
R/W
R/W
R/W
R/W
R/W
Transmit Framer Configuration
Transmitter Configuration
Transmit Frame Format
Transmit Error Insert
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TFRM
TERROR
TMAN
Transmit Manual
Sa-Byte/FEBE Configuration
075
076
077
078
TALM
TPATT
TLB
R/W
R/W
R/W
R/W
Transmit Alarm Signal
Configuration
—
—
—
—
—
—
—
—
—
—
—
—
Transmit Test Pattern
Configuration
Transmit Inband Loopback
Code Configuration
LBP
Transmit In-Band Loopback
Code Pattern
07B
07C
07D
07E
07F
090
TSA4
TSA5
R/W
R/W
R/W
R/W
R/W
R/W
Transmit Sa4 Byte Buffer
Transmit Sa5 Byte Buffer
Transmit Sa6 Byte Buffer
Transmit Sa7 Byte Buffer
Transmit Sa8 Byte Buffer
—
—
—
—
—
07
—
—
—
—
—
07
—
—
—
—
—
07
TSA6
TSA7
TSA8
CLAD_CR
Clock Rate Adapter
Configuration
091
092
CSEL
R/W
R/W
CLAD Frequency Select
01
00
01
00
01
00
CPHASE
CLAD Phase Detector Scale
Factor
093
0A0
CTEST
BOP
R/W
R/W
CLAD Test
00
00
00
00
00
00
Bit Oriented Protocol
Transceiver
0A1
0A2
0A3
TBOP
RBOP
R/W
R
Transmit BOP Code Word
Receive BOP Code Word
BOP Status
00
—
—
00
—
—
00
—
—
BOP_STAT
R
N8370DSE
Conexant
3-5