3.0 Registers
Bt8370/8375/8376
3.1 Address Map
Fully Integrated T1/E1 Framer and Line Interface
Table 3-1. Address Map (8 of 8)
Default Register Setting
Address
Acronym
(Hex)
R/W
Description
Bt8370
Bt8375
Bt8376
100–11F
120–13F
140–15F
160–17F
180–19F
1A0–1BF
1C0–1DF
1E0–1FF
TPCn:
n = 0 to 31
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Transmit Per-Channel Control
Transmit Signaling Buffer
Transmit PCM Slip Buffer
Transmit PCM Slip Buffer
Receive Per-Channel Control
Receive Signaling Buffer
Receive PCM Slip Buffer
Receive PCM Slip Buffer
—
—
—
TSIGn:
n = 0 to 31
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TSLIP_LOn:
n = 0 to 31
TSLIP_HIn:
n = 0 to 31
RPCn:
n = 0 to 31
RSIGn:
n = 0 to 31
RSLIP_LOn:
n = 0 to 31
RSLIP_HIn:
n = 0 to 31
3-8
Conexant
N8370DSE