AIS Baseband Processor
CMX910
tracking of the slot and sample counters with minimal µC intervention, using the UTC1PPS signal as a
timing reference (section 5.4.2).
A “Sleep Control” feature is provided which can reduce power consumption significantly when the
CMX910 is enabled for AIS reception. This operates by automatically turning off the internal receiver
circuits during inactive slots. Sleep Control is described in more detail in section 5.4.3.
The Slot and Sample Timer circuit is configured and controlled through nine C-BUS registers:
Slot_Sample_Control register: 8-bit write only.
C-BUS Address $10
Register reset to $80.
7
6
5
4
3
2
1
0
Bit:
Slot
clock
ctrl
En
Reserved, set to 0000
sleep Nudge mode
mode
Slot_Sample_Control register b7: SLOTCLKN Pin Control
With b7 = 0 the SLOTCLKN pin will be configured to have active pull-up and pull-down drivers. If
b7 = 1 the pin will have an open-drain pull-down, requiring an external pull-up resistor.
Slot_Sample_Control register b2: Enable Sleep Mode
Setting b2 = 1 enables AIS sleep mode on receive channels Rx1 and Rx2.
Slot_Sample_Control register b1-0: Nudge Mode
The Nudge Mode bits control how the CMX910 achieves and maintains synchronisation of the
slot and sample counters with the UTC timing reference.
b1
b0
0
0
1
1
0
1
0
1
Manual nudge (auto nudge disabled)
Auto nudge acquire
Auto nudge track
Reserved, do not use
Slot_Sample_Count register: 32-bit read only.
C-BUS Address $11
All bits cleared to 0 on reset.
31
0
30
0
29
0
28
0
27
26
10
25
9
24
8
23
7
22
21
20
4
19
3
18
2
17
1
16
0
Bit:
Bit:
Slot count
15
0
14
0
13
0
12
0
11
0
6
5
Sample count
The Slot_Sample_Count register holds the current value of the slot and sample counters.
© 2009 CML Microsystems Plc
14
D/910/6
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