PMR Signalling Processor
CMX881
1.6.2
$01 C-BUS RESET: address only.
The reset command has no data attached to it. It sets the device registers into the states listed below.
Addr.
REG.
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
$B0
ANALOGUE GAIN
SIGNAL ROUTING
AUXILIARY ADC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
$B1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
$B2
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
THRESHOLDS
$B3
$B4
$C0
$C1
$C2
$C3
$C5
$C6
$C7
$C8
$CA
$CC
$CD
$CE
$CF
AUXILIARY ADC TIMING
AUXILIARY ADC DATA
POWER DOWN CONTROL
MODE CONTROL
AUDIO & CTCSS CONTROL
TX TONE
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
X
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
0
0
RX DATA
STATUS
Reserved Register Address
PROGRAMMING REGISTER
TX DATA
TONE STATUS
AUDIO TONE
INTERRUPT MASK
Reserved Register Address
Following a C-BUS reset all of the programming registers (P0 – P4) are reset to zero except the
following:
P0.0
P0.1
P0.2
P0.3
P4.7
Frame SYNC LSB
Frame SYNC MSB
Frame SYND LSB
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
0
-
0
0
0
0
-
0
0
0
0
-
0
0
0
0
-
1
1
0
1
-
1
1
0
0
-
0
0
1
1
-
1
0
1
1
-
0
0
0
0
-
1
1
0
1
-
1
0
1
0
-
1
0
1
0
-
-
Frame SYND MSB
Transmit Limiter Control
-
1
This initiates the device with the MPT frame SYNC pattern of $C4D7 and the PAA frame SYND pattern
of $B433. The transmit limiter value is initialised to the maximum limit.
2004 CML Microsystems Plc
30
D/881/7
CMLMICRO [ CML MICROCIRCUITS ]
