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CMX881 参数 Datasheet PDF下载

CMX881图片预览
型号: CMX881
PDF下载: 下载PDF文件 查看货源
内容描述: 基带处理器的PMR和集群对讲机 [Baseband Processor for PMR and Trunked Radios]
分类和应用: 对讲机
文件页数/大小: 59 页 / 863 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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PMR Signalling Processor  
CMX881  
1.6.3  
$B0 ANALOGUE GAIN: 16-bit write-only  
Bit:  
15  
14  
13  
12  
11  
10  
9
8
7
0
6
5
4
3
2
1
0
MOD_1  
MOD_2  
Input  
Gain  
Audio Output  
Attenuation  
Inv_1  
Inv_2  
Attenuation  
Attenuation  
Bits 15 and 11 set the phase of the MOD_1 and MOD_2 outputs. When set to '0' the 'true' signal (0°  
phase shift) will be produced, when set to '1' the signal will be inverted (180° phase shift). This can be  
useful when interfacing with rf circuitry or when generating an inverted turn off tone for CTCSS. Any  
change will take place immediately after these bits are changed.  
The output paths provide user programmable attenuation stages to independently adjust the output levels  
of the modulators. Finer level control of the MOD_1 and MOD_2 outputs can be achieved with the FINE  
OUTPUT GAIN 1 and FINE OUTPUT GAIN 2 registers (P4.2-3).  
MOD_1 Output  
Attenuation  
MOD_2 Output  
Attenuation  
Bit 14 Bit 13 Bit 12  
Bit 10 Bit 9 Bit 8  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
>40dB  
12dB  
10dB  
8dB  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
>40dB  
12dB  
10dB  
8dB  
6dB  
6dB  
4dB  
4dB  
2dB  
2dB  
0dB  
0dB  
Bit 7 is reserved - set to 0.  
Bits 6 to 4 control the input path programmable gain stage - useful when amplifying low power voice  
signals from the microphone inputs. Finer gain control can be achieved with the ‘FINE INPUT GAIN’  
control register (P4.0). In receive mode it is recommended to set the gain to 0dB.  
Audio Output  
Bit 6 Bit 5 Bit 4  
Input Gain  
Bit 3 Bit 2 Bit 1 Bit 0  
Attenuation  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0dB  
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
>60dB  
44.8dB  
41.6dB  
38.4dB  
35.2dB  
32.0dB  
28.8dB  
25.6dB  
22.4dB  
19.2dB  
16.0dB  
12.8dB  
9.6dB  
3.2dB  
6.4dB  
9.6dB  
12.8dB  
16.0dB  
19.2dB  
22.4dB  
6.4dB  
3.2dB  
0dB  
Bits 3 to 0 control the output path programmable attenuation stage to adjust the volume of the audio  
output signal. Finer volume control can be achieved with the ‘FINE OUTPUT GAIN 1’ control register  
(P4.2).  
2004 CML Microsystems Plc  
31  
D/881/7  
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