CL-PS7500FE
System-on-a-Chip for Internet Appliance
10.3.57 CURSCUR (0x1C0) — Cursor DMA Current
31
29 28
4
3
0
X
X
X
C C C C C C C C C C C C C C C C C C C C C C C C C
0 0 0 0
The cursor current register need not normally be written to as the value in the Init register is transferred
into it during the FLYBACK period. It is then updated automatically in qword increments during DMA.
C
Current fetch location
Write
bits[31:29] unused
bits[28:4] cursor current DMA fetch location
bits[3:0] ignored
Read
bits[31:29] undefined
bits[28:4] cursor current DMA fetch location
bits[3:0] always ‘0’
10.3.58 CURSINIT (0x1C4) — Cursor DMA INIT
31
29 28
4
3
0
X
X
X
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
0 0 0 0
This register is written with the initial location of the cursor data buffer.
I
initial fetch location
Write
bits[31:29] unused
bits[28:4] cursor initial DMA fetch location
bits[3:0] ignored
Read
bit[31:29] undefined
bits[28:4] cursor initial DMA fetch location
bits[3:0] always ‘0’
10.3.59 VIDCURB (0x1C8) — Duplex LCD Video DMA Current B
31
29 28
4
3
0
X
X
X
C C C C C C C C C C C C C C C C C C C C C C C C C
0 0 0 0
The B Video DMA Address registers are for use with dual-panel LCDs. The current registers do not nor-
mally need to be programmed as the value in the relevant INIT register is loaded into the current register
during the FLYBACK period. This register gives the current location of the DMA data for the lower panel.
C
current fetch location B
Write
bits[31:29] unused
bits[28:4] video current B DMA fetch location
bits[3:0] ignored
Read
bits[31:29] undefined
bits[28:4] video current B DMA fetch location
bits[3:0] always ‘0’
June 1997
103
ADVANCE DATA BOOK v2.0
MEMORY AND I/O PROGRAMMERS’ MODEL
CIRRUS [ CIRRUS LOGIC ]
