Application Information: continued
6) Keep the inductor switching node small by placing the
output inductor, switching and synchronous FETs close
together.
12) Place the COFF and COMP capacitors as close as possi-
ble to the COFF and COMP pins.
13) Place the current limit filter capacitor between the VFB
and VOUT pins, as close as possible to the pins.
7) The MOSFET gate traces to the IC must be as short,
straight, and wide as possible.
14) Connect the filter components of the following pins:
8) Use fewer, but larger output capacitors, keep the capaci- VFB, VOUT, COFF, and COMP to the Gnd pin with a single
tors clustered, and use multiple layer traces with heavy
copper to keep the parasitic resistance low.
trace, and connect this local Gnd trace to the output capaci-
tor Gnd.
9) Place the switching MOSFET as close to the +5V input
capacitors as possible.
15) The “Droop” Resistor (embedded PCB trace) has to be
wide enough to carry the full load current.
10) Place the output capacitors as close to the load
as possible.
16) Place the VCC bypass capacitor as close as possible to
the IC.
11) Place the VFB,VOUT filter resistors (510Ω) in series with
the VFB and VOUT pins as close as possible to the pins.
19
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
