Application Information: continued
The designer must also verify that the inductor value
yields reasonable inductor peak and valley currents (the
inductor current is a triangular waveform):
I
L(PEAK)
= I
OUT
+
where
I
L(PEAK)
= inductor peak current;
I
OUT
= load current;
∆I
L
= inductor ripple current.
I
L(VALLEY)
= I
OUT
−
∆I
L
2
,
∆I
L
2
,
I
CIN(RMS)
,
I
RIPPLE
CS51313
N
CIN
=
where
N
CIN
= number of input capacitors;
I
CIN(RMS)
= total input RMS current;
I
RIPPLE
= input capacitor ripple current rating (specified
in manufacturer’s data sheets).
The total input capacitor ESR needs to be determined in
order to calculate the power dissipation of the input capac-
itors:
ESR
CIN
=
ESR
CAP
,
N
CIN
where I
L(VALLEY)
= inductor valley current.
Given the requirements of an application such as a buck
converter, it is found that a toroid powdered iron core is
quite suitable due to its low cost, low core losses at the
switching frequency, and low EMI.
Step 5: Selection of the Input Capacitors
These components must be selected and placed carefully to
yield optimal results. Capacitors should be chosen to pro-
vide acceptable ripple on the input supply lines. A key
specification for input capacitors is their ripple current rat-
ing. The input capacitor should also be able to handle the
input RMS current I
IN(RMS)
.
The combination of the input capacitors C
IN
discharges
during the on-time.
The input capacitor discharge current is given by:
I
CINDIS(RMS)
=
(I
L(PEAK)2
+ (I
L(PEAK)
×
I
L(VALLEY)
) + I
L(VALLEY)2
×
D
3
where
I
CINDIS(RMS)
= input capacitor discharge current;
I
L(PEAK)
= inductor peak current;
I
L(VALLEY)
= inductor valley current.
C
IN
charges during the off-time, the average current
through the capacitor over one switching cycle is zero:
I
CIN(CH)
= I
CIN(DIS)
×
D
1
−
D
,
,
where
ESR
CIN
= total input capacitor ESR;
ESR
CAP
= maximum ESR per capacitor (specified in
manufacturer’s data sheets);
N
CIN
= number of input capacitors.
Once the total ESR of the input capacitors is known, the
input capacitor ripple voltage can be determined using the
formula:
V
CIN(RMS)
= I
CIN(RMS)
×
ESR
CIN
,
where
V
CIN(RMS)
= input capacitor RMS voltage;
I
CIN(RMS)
= total input RMS current;
ESR
CIN
= total input capacitor ESR.
The designer must determine the input capacitor power
loss in order to ensure there isn’t excessive power dissipa-
tion through these components. The following formula is
used:
P
CIN(RMS)
= I
CIN(RMS)2
×
ESR
CIN
where
P
CIN(RMS)
= input capacitor RMS power dissipation;
I
CIN(RMS)
= total input RMS current;
ESR
CIN
= total input capacitor ESR.
Step 6: Selection of the Input Inductor
A CPU switching regulator, such as the one in a buck
topology, must not disturb the primary +5V supply. One
method of achieving this is by using an input inductor and
a bypass capacitor. The input inductor isolates the +5V
supply from the noise generated in the switching portion
of the microprocessor buck regulator and also limits the
inrush current into the input capacitors upon power up.
The inductor’s limiting effect on the input current slew rate
becomes increasingly beneficial during load transients. The
worst case is when the CPU load changes from no load to
full load (load step), a condition under which the highest
voltage change across the input capacitors is also seen by
the input inductor. The inductor successfully blocks the
ripple current while placing the transient current require-
ments on the input bypass capacitor bank, which has to
initially support the sudden load change.
The minimum inductance value for the input inductor is
therefore:
where
I
CIN(CH)
= input capacitor charge current;
I
CIN(DIS)
= input capacitor discharge current;
D = Duty Cycle.
The total Input RMS current is:
I
CIN(RMS)
=
(I
CIN(DIS)2
×
D) + (I
CIN(CH)2
×
(1
−
D))
The number of input capacitors required is then deter-
mined by:
13
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
