CM6802
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO
Selecting RAC for IAC pin
Cycle-By-Cycle Current Limiter and Selecting RS
IAC pin is the input of the gain modulator. IAC also is a
current mirror input and it requires current input. By
selecting a proper resistor RAC, it will provide a good sine
wave current derived from the line voltage and it also helps
program the maximum input power and minimum input line
voltage.
The ISENSE pin, as well as being a part of the current feedback
loop, is a direct input to the cycle-by-cycle current limiter for
the PFC section. Should the input voltage at this pin ever be
more negative than –1V, the output of the PFC will be
disabled until the protection flip-flop is reset by the clock
pulse at the start of the next PFC power cycle.
RAC=Vin peak x 7.9K. For example, if the minimum line
voltage is 80VAC, the RAC=80 x 1.414 x 7.9K=894Kohm.
RS is the sensing resistor of the PFC boost converter. During
the steady state, line input current x RS = IGAINMOD x 3.5K.
Since the maximum output voltage of the gain modulator is
IGAINMOD max x 3.5K= 0.8V during the steady state, RS x line
input current will be limited below 0.8V as well. Therefore, to
choose RS, we use the following equation:
Current Error Amplifier, IEAO
The current error amplifier’s output controls the PFC duty
cycle to keep the average current through the boost
inductor a linear function of the line voltage. At the inverting
input to the current error amplifier, the output current of the
gain modulator is summed with a current which results from
a negative voltage being impressed upon the ISENSE pin.
The negative voltage on ISENSE represents the sum of all
currents flowing in the PFC circuit, and is typically derived
from a current sense resistor in series with the negative
terminal of the input bridge rectifier. In higher power
applications, two current transformers are sometimes used,
one to monitor the IF of the boost diode. As stated above,
the inverting input of the current error amplifier is a virtual
ground. Given this fact, and the arrangement of the duty
cycle modulator polarities internal to the PFC, an increase
in positive current from the gain modulator will cause the
output stage to increase its duty cycle until the voltage on
ISENSE is adequately negative to cancel this increased
current. Similarly, if the gain modulator’s output decreases,
the output duty cycle will decrease, to achieve a less
negative voltage on the ISENSE pin.
RS =0.7V x Vinpeak/(2x Line Input power)
For example, if the minimum input voltage is 80VAC, and the
maximum input rms power is 200Watt, RS = (0.7V x 80V x
1.414)/(2 x 200) = 0.197 ohm.
PFC OVP
In the CM6802, PFC OVP comparator serves to protect the
power circuit from being subjected to excessive voltages if
the load should suddenly change. A resistor divider from the
high voltage DC output of the PFC is fed to VFB. When the
voltage on VFB exceeds 2.75V, the PFC output driver is shut
down. The PWM section will continue to operate. The OVP
comparator has 250mV of hysteresis, and the PFC will not
restart until the voltage at VFB drops below 2.50V. The VFB
power components and the CM6802 are within their safe
operating voltages, but not so low as to interfere with the
boost voltage regulation loop. Also, VCC OVP can be served
as a redundant PFCOVP protection. VCC OVP threshold is
19.4V with 1.5V hysteresis.
To Disable PFC Green Mode, a 1 Mega ohm resistor is
needed between IEAO(pin1) and VREF(pin14).
This 1 Mega ohm resistor will reduce the DC gain but it will
not impact the performance.
Figure 1. PFC Section Block Diagram
2003/06/25 Preliminary
Champion Microelectronic Corporation
Page 10
CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
