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CM6802 参数 Datasheet PDF下载

CM6802图片预览
型号: CM6802
PDF下载: 下载PDF文件 查看货源
内容描述: 无泄漏电阻GREEN MODE PFC / PWM控制器, COMBO [NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO]
分类和应用: 功率因数校正控制器
文件页数/大小: 18 页 / 338 K
品牌: CHAMP [ CHAMPION MICROELECTRONIC CORP. ]
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CM6802  
NO BLEED RESISTOR GREEN MODE PFC/PWM CONTROLLER COMBO  
Soft Start  
Generating VCC  
Start-up of the PWM is controlled by the selection of the  
external capacitor at SS. A current source of 20µA supplies  
the charging current for the capacitor, and start-up of the  
PWM begins at 1.25V. Start-up delay can be programmed  
by the following equation:  
After turning on CM6802 at 15V, the operating voltage can  
vary from 10V to 19.4V. The threshold voltage of VCC OVP  
comparator is 19.4V. The hysteresis of VCC OVP is 1.5V.  
When VCC see 19.4V, PFCOUT will be low, and PWM  
section will not be disturbed. That’s the two ways to generate  
VCC. One way is to use auxiliary power supply around 15V,  
and the other way is to use bootstrap winding to self-bias  
CM6802 system. The bootstrap winding can be either taped  
from PFC boost choke or from the transformer of the DC to  
DC stage.  
20µA  
x
CSS = tDELAY  
1.25V  
where CSS is the required soft start capacitance and the  
DEALY is the desired start-up delay.  
t
The ratio of winding transformer for the bootstrap should be  
set between 18V and 15V. A filter network is recommended  
between VCC (pin 13) and bootstrap winding. The resistor of  
the filter can be set as following.  
It is important that the time constant of the PWM soft-start  
allow the PFC time to generate sufficient output power for  
the PWM section. The PWM start-up delay should be at  
least 5ms.  
RFILTER x IVCC ~ 2V, IVCC = IOP + (QPFCFET + QPWMFET ) x fsw  
IOP = 3mA (typ.)  
Solving for the minimum value of CSS  
:
If anything goes wrong, and VCC goes beyond 19.4V, the  
PFC gate (pin 12) drive goes low and the PWM gate drive  
(pin 11) remains function. The resistor’s value must be  
chosen to meet the operating current requirement of the  
CM6802 itself (3mA, max.) plus the current required by the  
two gate driver outputs.  
20µA  
CSS = 5ms x  
= 80nF  
1.25V  
Caution should be exercised when using this minimum soft  
start capacitance value because premature charging of the  
SS capacitor and activation of the PWM section can result if  
VFB is in the hysteresis band of the VIN OK comparator at  
start-up. The magnitude of VFB at start-up is related both to  
line voltage and nominal PFC output voltage. Typically, a  
1.0µF soft start capacitor will allow time for VFB and PFC  
out to reach their nominal values prior to activation of the  
PWM section at line voltages between 90Vrms and  
265Vrms.  
2003/06/25 Preliminary  
Champion Microelectronic Corporation  
Page 13  
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