CAT28F010
A.C. CHARACTERISTICS, Read Operation
V
= +5V ±10%, unless otherwise specified.
CC
28F010-70
28F010-90
28F010-12
\JEDEC
Symbol
Standard
Symbol Parameter
Min. Max Min. Max. Min. Max. Unit
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle Time
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
70
0
90
0
120
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
AVAV
WC
AS
AH
DS
DH
CS
CH
WP
AVWL
WLAX
DVWH
WHDX
ELWL
40
40
10
0
40
40
10
0
40
40
10
0
CE Setup Time
CE Hold Time
0
0
0
WHEH
WLWH
WHWL
WHWH1
WHWH2
WHGL
WE Pulse Width
WE High Pulse Width
Program Pulse Width
Erase Pulse Width
40
20
10
9.5
40
20
10
9.5
40
20
10
9.5
WPH
(2)
(2)
-
-
Write Recovery Time
Before Read
-
6
6
6
µs
t
t
Read Recovery Time
Before Write
GHWL
-
-
0
0
0
µs
V
Setup Time to CE
100
100
100
ns
VPEL
PP
(1)
ERASE AND PROGRAMMING PERFORMANCE
28F010-55
28F010-70
28F010-90
28F010-12
Parameter
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max Min. Typ. Max. Unit
(3)(5)
Chip Erase Time
0.5 10
12.5
0.5 10
12.5
0.5
2
10
0.5 10 Sec
12.5 Sec
(3)(4)
Chip Program Time
2
2
12.5
2
Note:
(1) Please refer to Supply characteristics for the value of VPPH and VPPL. The VPP supply can be either hardwired or switched. If VPP is
switched, VPPL can be ground, less than VCC + 2.0V or a no connect with a resistor tied to ground.
(2) Program and Erase operations are controlled by internal stop timers.
(3) ‘Typicals’ are not guaranteed, but based on characterization data. Data taken at 25°C, 12.0V VPP
.
(4) Minimum byte programming time (excluding system overhead) is 16 µs (10 µs program + 6 µs write recovery), while maximum is 400 µs/
byte (16 µs x 25 loops). Max chip programming time is specified lower than the worst case allowed by the programming algorithm since
most bytes program significantly faster than the worst case byte.
(5) Excludes 00H Programming prior to Erasure.
Doc. No. 25005-0A 2/98 F-1
6
CATALYST [ CATALYST SEMICONDUCTOR ]
