CAT28F010
PIN CONFIGURATION
PIN FUNCTIONS
DIP Package (P)
Pin Name
Type
Function
V
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
WE
PP
A0–A16
Input
Address Inputs for
memory addressing
A
2
16
15
12
PLCC Package (N)
A
3
N/C
A
4
A
A
A
A
A
14
13
8
I/O0–I/O7
CE
I/O
Data Input/Output
Chip Enable
Output Enable
Write Enable
Voltage Supply
Ground
A
5
7
6
A
6
Input
Input
Input
4
3 2 1 32 31 30
A
7
5
9
5
6
7
8
9
29
28
27
26
25
24
23
22
21
A
A
A
A
A
A
A
7
6
5
4
3
2
1
0
0
14
13
8
A
8
OE
4
11
A
9
OE
3
A
WE
A
10
11
12
13
14
15
16
A
2
10
CE
A
9
A
1
A
11
VCC
A
I/O
I/O
I/O
I/O
I/O
0
7
6
5
4
3
10
11
12
13
A
OE
I/O
I/O
I/O
0
A
A
10
CE
VSS
1
A
2
I/O
I/O
VPP
Program/Erase
Voltage Supply
7
V
14 15 16 17 18 19 20
SS
5108 FHD F01
5108 FHD F01
TSOP Package (Standard Pinout 8mm x 20mm) (T)
A
A
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A
10
CE
11
9
8
A
A
NC
I/O
I/O
I/O
I/O
I/O
13
14
7
6
5
4
3
WE
V
V
A
A
A
CC
PP
16
15
12
V
SS
I/O
I/O
I/O
2
1
0
A
A
A
A
A
A
A
A
7
6
5
4
0
1
2
3
TSOP Package (Reverse Pinout) (TR)
OE
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
A
A
A
A
NC
WE
V
V
A
A
A
A
A
A
A
11
9
8
13
14
A
CE
10
I/O
7
6
I/O
I/O
I/O
I/O
5
4
3
CC
9
V
SS
PP
16
15
12
7
6
5
4
10
11
12
13
14
15
16
I/O
I/O
I/O
A
A
A
2
1
0
0
1
2
3
A
5108 FHD F14
Doc. No. 25005-0A 2/98 F-1
2
CATALYST [ CATALYST SEMICONDUCTOR ]
