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SLES100 − DECEMBER 2003
External Digital Filter Interface and Timing
The PCM1796 supports an external digital filter interface comprising a 3- or 4-wire synchronous serial port, which
allows the use of an external digital filter. External filters include the Texas Instruments’ DF1704 and DF1706, the
Pacific Microsonics PMD200, or a programmable digital signal processor.
In the external DF mode, LRCK (pin 4), BCK (pin 6) and DATA (pin 5) are defined as WDCK, the word clock; BCK,
the bit clock; and DATA, the monaural data. The external digital filter interface is selected by using the DFTH bit of
control register 20, which functions to bypass the internal digital filter of the PCM1796.
When the DFMS bit of control register 19 is set, the PCM1796 can process stereo data. In this case, ZEROL (pin 1)
and ZEROR (pin 2) are defined as L-channel data and R-channel data input, respectively.
Detailed information for the external digital filter interface mode is provided in the APPLICATION FOR EXTERNAL
DIGITAL FILTER INTERFACE section of this data sheet.
Direct Stream Digital (DSD) Format Interface and Timing
The PCM1796 supports the DSD format interface operation, which includes out-of-band noise filtering using an
internal analog FIR filter. For DSD operation, SCK (pin 7) is redefined as BCK, DATA (pin 5) as DATAL (left channel
audio data), and LRCK (pin 4) as DATAR (right channel audio data). BCK (pin 6) must be forced low in the DSD mode.
The DSD format interface is activated by setting the DSD bit of control register 20.
Detailed information for the DSD mode is provided in the APPLICATION FOR DSD FORMAT (DSD MODE)
INTERFACE section of this data sheet.
TDMCA Interface
The PCM1796 supports the time-division-multiplexed command and audio (TDMCA) data format to enable control
of and communication with a number of external devices over a single serial interface.
Detailed information for the TDMCA format is provided in the TDMCA INTERFACE FORMAT section of this data
sheet.
FUNCTION DESCRIPTIONS
Zero Detect
The PCM1796 has a zero-detect function. When the PCM1796 detects the zero conditions as shown in Table 2, the
PCM1796 sets ZEROL (pin 1) and ZEROR (pin 2) to HIGH.
Table 2. Zero Conditions
MODE
DETECTING CONDITION AND TIME
PCM
DATA is continuously LOW for 1024 LRCKs.
External DF Mode DATA is continuously LOW for 8 × 1024 WDCKs.
DZ0
There are an equal number of 1s and 0s in every 8 bits of DSD
input data for 23 ms.
DSD
DZ1
The input data is 1001 0110 continuously for 23 ms.
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