DEFINITION OF TERMS
Effective Resolution (ER)—of the ADS1252 in a particular
configuration can be expressed in two different units:
bits rms (referenced to output) and µVrms (referenced to
input). Computed directly from the converter's output data,
each is a statistical calculation based on a given number of
results. Noise occurs randomly; the rms value represents a
statistical measure which is one standard deviation. The ER
in bits can be computed as follows:
An attempt has been made to be consistent with the termi-
nology used in this data sheet. In that regard, the definition
of each term is given as follows:
Analog Input Differential Voltage—for an analog signal
that is fully differential, the voltage range can be compared
to that of an instrumentation amplifier. For example, if both
analog inputs of the ADS1252 are at 2.048V, the differential
voltage is 0V. If one analog input is at 0V and the other
analog input is at 4.096V, then the differential voltage
magnitude is 4.096V. This is the case regardless of which
input is at 0V and which is at 4.096V. The digital output
result, however, is quite different. The analog input differen-
tial voltage is given by the following equation:
2 • VREF
20 • log
Vrms noise
ER in bits rms =
6.02
The 2 • VREF figure in each calculation represents the full-
scale range of the ADS1252. This means that both units are
absolute expressions of resolution—the performance in dif-
ferent configurations can be directly compared, regardless of
the units.
+VIN – –VIN
A positive digital output is produced whenever the analog
input differential voltage is positive, while a negative digital
output is produced whenever the differential is negative. For
example, a positive full-scale output is produced when the
converter is configured with a 4.096V reference, and the
analog input differential is 4.096V. The negative full-scale
output is produced when the differential voltage is –4.096V.
In each case, the actual input voltages must remain within
the XGND to +VDD range.
Noise Reduction—for random noise, the ER can be im-
proved with averaging. The result is the reduction in noise
by the factor √N, where N is the number of averages, as
shown in Table IV. This can be used to achieve true 24-bit
performance at a lower data rate. To achieve 24 bits of
resolution, more than 24 bits must be accumulated. A 36-bit
accumulator is required to achieve an ER of 24 bits. The
following uses VREF = 4.096V. With the ADS1252 output-
ting data at 40kHz, a 4096 point average will take 102.4ms.
The benefits of averaging will be degraded if the input signal
drifts during that 100ms.
Actual Analog Input Voltage—the voltage at any one
analog input relative to GND.
Full-Scale Range (FSR)—as with most A/D converters, the
full-scale range of the ADS1252 is defined as the “input”
which produces the positive full-scale digital output minus
the “input” which produces the negative full-scale digital
output. For example, when the converter is configured with
a 4.096V reference, the differential full-scale range is:
N
NOISE
REDUCTION
FACTOR
ER
IN
VRMS
ER
IN
BITS RMS
(NUMBER
OF AVERAGES)
1
2
1
1.414
2
31.3µV
22.1µV
15.6µV
11.1µV
7.82µV
5.53µV
3.91µV
2.77µV
1.96µV
1.38µV
978nV
692nV
489nV
18
18.5
19
4
[4.096V (positive full scale) – (–4.096V) (negative full scale)] = 8.192V
8
2.82
4
19.5
20
Least Significant Bit (LSB) Weight—this is the theoretical
amount of voltage that the differential voltage at the analog
input would have to change in order to observe a change in
the output data of one least significant bit. It is computed as
follows:
16
32
5.66
8
20.5
21
64
128
256
512
1024
2048
4096
11.3
16
21.5
22
22.6
32
22.5
23
Full−Scale Range
LSBWeight =
2N
45.25
64
23.5
24
where N is the number of bits in the digital output.
TABLE IV. Averaging.
Conversion Cycle—as used here, a conversion cycle refers
to the time period between DOUT/DRDY pulses.
®
ADS1252
14
BB [ BURR-BROWN CORPORATION ]
