LAYOUT
SYSTEM CONSIDERATIONS
POWER SUPPLY
The recommendations for power supplies and grounding will
change depending on the requirements and specific design of
the overall system. Achieving 24 bits of noise performance
is a great deal more difficult than achieving 12 bits of noise
performance. In general, a system can be broken up into four
different stages:
The power supply should be well regulated and low noise.
For designs requiring very high resolution from the ADS1252,
power supply rejection will be a concern. Avoid running
digital lines under the device as they may couple noise onto
the die. High frequency noise can capacitively couple into
the analog portion of the device and will alias back into the
passband of the digital filter, affecting the conversion result.
• Analog Processing
• Analog Portion of the ADS1252
• Digital Portion of the ADS1252
• Digital Processing
GROUNDING
The analog and digital sections of the system design should
be carefully and cleanly partitioned. Each section should
have its own ground plane with no overlap between them.
GND should be connected to the analog ground plane, as
well as all other analog grounds. Do not join the analog and
digital ground planes on the board, but instead connect the
two with a moderate signal trace. For multiple converters,
connect the two ground planes at one location as central to
all of the converters as possible. In some cases, experimen-
tation may be required to find the best point to connect the
two planes together. The printed circuit board can be de-
signed to provide different analog/digital ground connec-
tions via short jumpers. The initial prototype can be used to
establish which connection works best.
For the simplest system consisting of minimal analog signal
processing (basic filtering and gain), a microcontroller, and
one clock source, one can achieve high resolution by power-
ing all components by a common power supply. In addition,
all components could share a common ground plane. Thus,
there would be no distinctions between “analog” power and
ground, and “digital” power and ground. The layout should
still include a power plane, a ground plane, and careful
decoupling. In a more extreme case the design could include:
• Multiple ADS1252s
• Extensive Analog Signal Processing
• One or More Microcontrollers, Digital Signal Processors,
or Microprocessors
• Many Different Clock Sources
• Interconnections to Various Other Systems
DECOUPLING
High resolution will be very difficult to achieve for this
design. The approach would be to break the system into as
many different parts as possible. For example, each ADS1252
may have its own “analog” processing front end.
Good decoupling practices should be used for the ADS1252
and for all components in the design. All decoupling capaci-
tors, and specifically the 0.1µF ceramic capacitors, should
be placed as close as possible to the pin being decoupled. A
1µF to 10µF capacitor, in parallel with a 0.1µF ceramic
capacitor, should be used to decouple VD to GND.
VDD1
VDD2
VREF
GND
Circuit
SCLK
GND
+VIN
–VIN
+VDD
CLK
VREF
GND
VS
ADS1252
ISO150
SCLK
DOUT/DRDY
VDD1
DOUT/DRDY
VDD2
GND
GND
FIGURE 16. Isolated Three-Wire Interface.
®
13
ADS1252
BB [ BURR-BROWN CORPORATION ]
