The latched version of Clip Detect may be used to generate
an interrupt to the user’s system computer, which would
then launch a service routine to generate the appropriate
alarms or corrective action. Another possible application
would be to stretch the pulse using a monostable so that it
would be easily visible when driving an LED warning lamp.
TESTING THE ADC701/SHC702
The ADC701 and SHC702 together form a very high perfor-
mance converter system and careful attention to test tech-
niques is necessary to achieve accurate results. Spectral
analysis by application of a Fast Fourier Transform (FFT) to
the ADC digital output is the best method of examining total
system performance. Attempts to evaluate the system by
analog reconstruction through a D/A converter will usually
prove unsatisfactory; assuming that the static and dynamic
distortions of the D/A can be brought below the required
level (–110dB), the performance will still be beyond the
range of presently available spectrum analyzers.
In some systems, it may be desirable to provide separate
latched outputs for Underrange and Overrange. These con-
ditions may be separately detected by using simple logic to
implement the boolean equations:
Underrange = Clip Detect AND Anybit
Overrange = Clip Detect AND Anybit
Even when the analysis is done using FFT techniques,
several key issues must be addressed. First, the parameters
of the FFT need to be adequate to perform the analysis and
extract meaningful data. Second, the proper selection of test
frequencies is critical for good results. Third, the limitations
of commercial signal generators must be considered. These
three points are addressed in later sections. Finally, the test
board layout must follow the recommendations discussed on
pages 8 through 10.
where “Anybit” is any one of the data output bits.
The Underrange and Overrange signals would then be latched
into two separate flip-flops. A simple solution using a single
’74 dual flip-flop and a single ’00 quad NAND provides
enough logic to implement the logic equations, with a spare
NAND gate left over to use for creating the inverted Data
Strobe signal.
USING THE ADC701 AT
MAXIMUM CONVERSION RATES
DYNAMIC PERFORMANCE DEFINITIONS
The ADC701 is guaranteed to accept Convert commands at
a rate of DC to 512kHz over the specified operating tem-
perature range. At a conversion rate of 500kHz, the total
throughput time of 2µs allows for the 1.5µs ADC conversion
time plus 500ns for the digital output timing and sample/
hold acquisition time.
1. Total Harmonic Distortion (THD):
Harmonic Power (first 9 harmonics)
10 log
Sinewave Signal Power
If the user tries to exceed the maximum conversion rate by
a large amount, the Convert Command of conversion N+1
will occur before the Data Strobe has fallen from conversion
N. In such a situation, the ADC701 will simply ignore every
other Convert command so the actual conversion rate will
become half of the Convert command rate. Otherwise, the
conversion will proceed normally. Note that the ADC timing
slows down at high temperatures, so the frequency at which
this occurs will vary with temperature—although it is still
guaranteed to be greater than 512kHz over the specified
temperature range.
2. Signal-to-Noise Ratio (SNR):
Sinewave Signal Power
10 log
Noise Power
3. Intermodulation Distortion (IMD):
IMD Product Power (RMS sum; to 3rd-order)
10 log
Sinewave Signal Power
4. Spurious-Free Dynamic Range (SFDR):
Another consideration for operation at very high rates is that
the sample/hold acquisition time becomes shorter as the
conversion rate is increased. Users will note that the avail-
able acquisition time becomes less than 550ns at rates above
500kHz, which is less than the typical SHC702 acquisition
time for a 10V step to 150µV accuracy. However, the signal
degradation is gradual as the acquisition time is shortened—
even at 512kHz, there is enough time to acquire a 5V step to
better than 500µV. Also, most signal processing environ-
ments do not contain full-power signals at the Nyquist
frequency, but rather show a rolloff of signal power at high
frequencies. If the ability to acquire extremely large input
changes at extremely high conversion rates is of paramount
importance, the user may elect to use a Burr-Brown model
SHC803 sample/hold instead—it is pin compatible with the
SHC702 and provides much faster acquisition time at the
expense of some extra noise and higher distortion at low
input frequencies.
Power of Peak Spurious Component
10 log
Sinewave Signal Power
IMD is referred to the larger of the test signals f1 or f2—not
to the total signal power, which would result in a number
approximately 6dB “better.” The zero frequency bin (DC) is
not included in these calculations—it represents total offset
of the ADC, SHC and test equipment and is of little impor-
tance in dynamic signal processing applications.
®
12
ADC701/SHC702
BB [ BURR-BROWN CORPORATION ]
