+15V
–15V
+5V
+
+
+
24
+15V
22
–15V
9
+5V
Connect for
Buffered Input
17
14
13
11
Buffer
Input
Hold
Buffer
Output
(1)
VIN
SHC702
Connect for
Direct Input
1
Analog
Input
Analog
Output
= Analog Ground Plane (5)
Hold
12
Common
15 21
10
23
Optional
Optional
+15V
–15V
+5V
–5V
Gain Adjust
20kΩ
Offset Adjust
500kΩ(6)
+
+
30kΩ
22
+
+
31
Input Ref Ref Ref Ref
In
Out Adj Com Commons Com Com
32
36
37
35
39
33
25
21
24
+15V
26
–15V
38
+5V
40
–5V
29
Analog Signal Power
Offset
Adjust
Offset
Adjust
D
27
28
Input A(2)
Input B
Start
Convert
ADC701
15
Convert Command In
Sample/Hold Command Out
High/Low
14
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit Data
Clip
Byte
Clock
4/12
1/9 2/10 3/11
5/13 6/14 7/15 8/16 Strobe Detect
Select
Adj +5V +5V
Digital Common
16 17 19
1
2
3
4
5
6
7
8
12
9
11
13
18
10
20
+
1kΩ
Optional
Clock Adjust
+5V
D
74HC574
Optional(4)
74HC574
Octal Flip-Flop
(3)
Q
Bit
4
Bit
1
Bit
2
Bit
3
Bit
5
Bit
6
Bit
7
Bit
8
Bit
9
Bit
10
Bit
11
Bit
12
Bit
13
Bit
14
Bit
15
Bit
16
Clip
Detect
(Latched)
NOTES: (1) For lowest distortion at high input frequencies the non-buffered option should be used. If the buffer is not used, its input should be grounded. (2) Shown
connected for ±5V input range. Refer to Input Connection Table for other options. (3) If the Clip Detect feature is used, then the signal may be latched with a simple
D type flip-flop as shown. See the section on ADC701 Digital I/O for additional applications information. (4) The second octal flip-flop is recommended but optional
— it provides added digital signal isolation and buffering, and also permits three-state logic output compatibility. (5) All commons should be connected to the analog
ground plane. Refer to the section on “Power and Ground Connections.” (6) The Offset Adjust circuit shown provides an adjustment range of approximately ±0.25%
FSR.
FIGURE 3. ADC701/SHC702 Connection Diagram.
®
9
ADC701/SHC702
BB [ BURR-BROWN CORPORATION ]
