Arizona Microtek, Inc.
AZP63
Low Phase Noise Sine Wave CMOS
to LVPECL Buffer/Translator
ENGINEERING NOTES
FUNCTIONALITY
The AZP63 is one of a family of parts that provide options of fixed ÷1, fixed ÷2 and selectable ÷1, ÷2 modes as well as
active high enable or active low enable to oscillator designers. Table 2 details the differences between the parts to assist
designers in selecting the optimal part for their design.
Table 3 lists the specific AZP63 functional operation.
Figure 2 plots the S-parameters of theD input. S-parameter and IBIS model files for the AZP63 are also available for
download.
Table 2 - AZP51-54 & AZP63 Family
EN pull-
up/pull-down
Part Number
Divide Ratio
EN Logic
Bandwidth
AZP51
AZP52
AZP53
AZP54
AZP63
÷1
÷2
active HIGH
active HIGH
selectable
active LOW
selectable
Pull-up
Pull-up
selectable
Pull-down
selectable
> 800MHz
> 800MHz
> 800MHz
> 800MHz
≥ 1GHz
Selectable ÷1 or ÷2
÷1
Selectable ÷1 or ÷2
Table 3 – AZP63 Functional Operation, ÷1 mode
Inputs
Outputs
Q
Part Number
EN_SEL
EN
Low, NC1
High
Q
D
Low Low
High High
High
Low
Z3
High, NC1
X2
Z3
Low Low
High
High, NC1
High High
Low
Z3
Low
AZP63
Low
X2
Z3
DIV_SEL
Divide Ratio
Low, NC1
÷1
÷2
High
1
2
3
Not connected
Don't care
Tri-State
www.azmicrotek.com
+1-480-962-5881
3
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Mar 2013, Rev 2.2
AZM [ ARIZONA MICROTEK, INC ]
