AZP63
www.azmicrotek.com
Low Phase Noise Sine Wave / CMOS
to LVPECL Buffer / Translator
DESCRIPTION
FEATURES
The AZP63 is a sine wave/CMOS to LVPECL buffer/translator optimized
for very low phase noise (-165dBc/Hz). It is particularly useful in
converting crystal or SAW based oscillators into LVPECL outputs for
greater than 1GHz of bandwidth. For lower power consumption and
reduced bandwidth, refer to the AZP5x family.
•
LVPECL outputs optimized
for very low phase noise
(-165dBc/Hz)
•
•
•
•
High bandwidth, > 1GHz
Selectable ÷1, ÷2 output
Selectable Enable logic
3.0V to 3.6V operation
The AZP63 is one of a family of parts that provide options of fixed ÷1,
fixed ÷2 and selectable ÷1, ÷2 modes as well as active high enable or active
low enable to oscillator designers. Refer to Table 2 for the comparison of
parts within the AZP5x and AZP63 family.
BLOCK DIAGRAM
APPLICATIONS
VDD
•
•
PECL clock sources
Crystal or SAW based
oscillators with LVPECL
output
EN_SEL
PU
pull-up
EN
(PU,PD)
pull-down
Q
÷1,2
D
PACKAGE AVAILABILITY
Q
Rbias
•
•
•
Available in die
SON8
Green/RoHS Compliant/Pb-Free
DIV_SEL
PD
VDD/2
GND
Order Number
AZP63QG1
Package
SON8
Marking
E <Date Code>2
1
2
Tape & Reel - Add 'R1' at end of order number for 7in (1k parts), 'R2' (2.5k) for 13in
See www.azmicrotek.com for date code format
www.azmicrotek.com
+1-480-962-5881
1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
Request a Sample
Mar 2013, Rev 2.2
AZM [ ARIZONA MICROTEK, INC ]
