Arizona Microtek, Inc.
AZP63
Low Phase Noise Sine Wave CMOS
to LVPECL Buffer/Translator
VDD (+3.3 V)
M2
Output
Stage
VDD (+3.3 V)
External
Circuitry
M1
Vbp
130Ω
130Ω
21.1mA
21.1mA
Q
Q
21.1mA - High
5.1mA - Low
82Ω
82Ω
M3
M4
D
M5
Vbn
16mA
Figure 5 - Dual Supply Output Termination
THREE RESISTOR TERMINATION
Another termination variant eliminates the need for the additional supply (Figure 6). Alternately three resistors and
one capacitor accomplish the same termination and reduce power consumption.
VDD (+3.3 V)
Output
Stage
M1
M2
External
Circuitry
Vbp
21.1mA
21.1mA
Q
Q
21.1mA - High
5.1mA - Low
50Ω
50Ω
M3
M4
D
0.01µF
50Ω
M5
Vbn
16mA
Figure 6 - Three Resistor Termination
www.azmicrotek.com
+1-480-962-5881
6
Request a Sample
Mar 2013, Rev 2.2
AZM [ ARIZONA MICROTEK, INC ]
