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AS29LV016JTRGR-55/IT 参数 Datasheet PDF下载

AS29LV016JTRGR-55/IT图片预览
型号: AS29LV016JTRGR-55/IT
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 2M ×8位/ 1M ×16位) CMOS 3.0伏只引导扇区闪存 [16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 40 页 / 408 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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COTS PEM  
BOOT SECTOR FLASH  
Austin Semiconductor, Inc.  
AS29LV016J  
PHYSICAL DIMENSIONS  
TS 048—48-Pin Standard TSOP  
2X  
0.10  
STANDARD PIN OUT (TOP VIEW)  
2X (N/2 TIPS)  
0.10  
2X  
2
0.10  
5
A2  
1
N
REVERSE PIN OUT (TOP VIEW)  
3
SEE DETAIL B  
A
B
1
N
E
N
2
N
2
+1  
e
9
5
D1  
A1  
N
N
2
4
+1  
2
D
0.25  
B
C
2X (N/2 TIPS)  
SEATING  
PLANE  
A
B
SEE DETAIL A  
0.08MM (0.0031")  
M
C
6
A - B S  
b
7
WITH PLATING  
c1  
(c)  
7
b1  
BASE METAL  
SECTION B-B  
R
(c)  
e/2  
GAUGE PLANE  
0.25MM (0.0098") BSC  
θ°  
PARALLEL TO  
SEATING PLANE  
X
C
L
X = A OR B  
DETAIL A  
DETAIL B  
NOTES:  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (mm).  
(DIMENSIONING AND TOLERANCING CONFORMS TO ANSI Y14.5M-1982)  
Jedec  
MO-142 (D) DD  
1
2
3
4
MIN  
NOM MAX  
1.20  
Symbol  
PIN 1 IDENTIFIER FOR REVERSE PIN OUT (DIE UP).  
A
A1  
A2  
b1  
b
c1  
c
D
PIN 1 IDENTIFIER FOR REVERSE PIN OUT (DIE DOWN), INK OR LASER MARK.  
0.15  
0.05  
0.95  
0.17  
0.17  
0.10  
0.10  
1.00  
0.20  
1.05  
0.23  
0.27  
TO BE DETERMINED AT THE SEATING PLANE -C- . THE SEATING PLANE IS DEFINED AS THE PLANE OF  
CONTACT THAT IS MADE WHEN THE PACKAGE LEADS ARE ALLOWED TO REST FREELY ON A FLAT  
HORIZONTAL SURFACE.  
0.22  
5
6
DIMENSIONS D1 AND E DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTUSION IS  
0.15mm (.0059") PER SIDE.  
0.16  
0.21  
19.80 20.00 20.20  
18.30 18.40 18.50  
11.90 12.00 12.10  
DIMENSION b DOES NOT INCLUDE DAMBAR PROTUSION. ALLOWABLE DAMBAR PROTUSION SHALL BE  
0.08 (0.0031") TOTAL IN EXCESS OF b DIMENSION AT MAX. MATERIAL CONDITION. MINIMUM SPACE  
BETWEEN PROTRUSION AND AN ADJACENT LEAD TO BE 0.07 (0.0028").  
D1  
E
e
7
THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10MM (.0039") AND  
0.25MM (0.0098") FROM THE LEAD TIP.  
0.50 BASIC  
L
0
R
N
0.50  
0˚  
0.60  
0.70  
8˚  
8
9
LEAD COPLANARITY SHALL BE WITHIN 0.10mm (0.004") AS MEASURED FROM THE SEATING PLANE.  
DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS.  
0.08  
0.20  
48  
3355 \ 16-038.10c  
* For reference only. BSC is an ANSI standard for Basic Space Centering.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS29LV016J  
Rev. 0.0 02/09  
39  
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