ATmega64A
Table 13-13. Overriding Signals for Alternate Functions PD7:PD4
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
PD7/T2
PD6/T1
PD5/XCK1
PD4/ICP1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
UMSEL1
0
0
0
XCK1 OUTPUT
0
0
0
0
0
0
0
0
0
T2 INPUT
–
T1 INPUT
–
XCK1 INPUT
–
ICP1 INPUT
–
AIO
Table 13-14. Overriding Signals for Alternate Functions in PD3:PD0(1)
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
PD3/INT3/TXD1
PD2/INT2/RXD1
PD1/INT1/SDA
PD0/INT0/SCL
TXEN1
RXEN1
TWEN
TWEN
0
PORTD2 • PUD
PORTD1 • PUD
TWEN
PORTD0 • PUD
TWEN
TXEN1
RXEN1
1
0
SDA_OUT
TWEN
SCL_OUT
TWEN
TXEN1
0
TXD1
0
0
0
INT3 ENABLE
INT2 ENABLE
INT1 ENABLE
1
INT0 ENABLE
1
1
1
INT3 INPUT
–
INT2 INPUT/RXD1
–
INT1 INPUT
SDA INPUT
INT0 INPUT
SCL INPUT
AIO
Note:
1. When enabled, the Two-wire Serial Interface enables Slew-rate controls on the output pins
PD0 and PD1. This is not shown on the figure. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module.
82
8160C–AVR–07/09
ATMEL [ ATMEL ]
