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ATMEGA64A-AU 参数 Datasheet PDF下载

ATMEGA64A-AU图片预览
型号: ATMEGA64A-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有64K字节的系统内可编程闪存 [8-bit Microcontroller with 64K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 7964 K
品牌: ATMEL [ ATMEL ]
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ATmega64A  
(TIMSK). TIFR and TIMSK are not shown in the figure since these registers are shared by other  
timer units.  
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on  
the T2 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter  
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source  
is selected. The output from the Clock Select logic is referred to as the timer clock (clkT2).  
The double buffered Output Compare Register (OCR2) is compared with the Timer/Counter  
value at all times. The result of the compare can be used by the Waveform Generator to gener-  
ate a PWM or variable frequency output on the Output Compare pin (OC2). For details, see  
“Output Compare Unit” on page 148. The Compare Match event will also set the Compare Flag  
(OCF2) which can be used to generate an Output Compare interrupt request.  
17.2.2  
Definitions  
Many register and bit references in this document are written in general form. A lower case “n”  
replaces the Timer/Counter number, in this case 2. However, when using the register or bit  
defines in a program, the precise form must be used (i.e., TCNT2 for accessing Timer/Counter2  
counter value and so on).  
The definitions in Table 17-1 are also used extensively throughout this section.  
Table 17-1. Definitions  
BOTTOM  
MAX  
The counter reaches the BOTTOM when it becomes 0x00.  
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).  
TOP  
The counter reaches the TOP when it becomes equal to the highest value in the  
count sequence. The TOP value can be assigned to be the fixed value 0xFF  
(MAX) or the value stored in the OCR2 Register. The assignment is dependent  
on the mode of operation.  
17.3 Timer/Counter Clock Sources  
The Timer/Counter can be clocked by an internal or an external clock source. The clock source  
is selected by the Clock Select logic which is controlled by the Clock Select (CS22:0) bits  
located in the Timer/Counter Control Register (TCCR2). For details on clock sources and pres-  
caler, see “Timer/Counter3, Timer/Counter2 and Timer/Counter1 Prescalers” on page 143.  
17.4 Counter Unit  
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure  
17-2 shows a block diagram of the counter and its surroundings.  
147  
8160C–AVR–07/09  
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