ATmega64A
17. 8-bit Timer/Counter2 with PWM
17.1 Features
• Single Channel Counter
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse width Modulator (PWM)
• Frequency Generator
• External Event Counter
• 10-bit Clock Prescaler
• Overflow and Compare Match Interrupt Sources (TOV2 and OCF2)
17.2 Overview
Timer/Counter2 is a general purpose, single-channel, 8-bit Timer/Counter module. A simplified
block diagram of the 8-bit Timer/Counter is shown in Figure 17-1. For the actual placement of
I/O pins, refer to “Pin Configuration” on page 2. CPU accessible I/O Registers, including I/O bits
and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in
the “Register Description” on page 157.
Figure 17-1. 8-bit Timer/Counter Block Diagram
TCCRn
count
TOVn
(Int.Req.)
clear
Control Logic
TOP
Clock Select
direction
clk
Tn
Edge
Detector
Tn
BOTTOM
( From Prescaler )
Timer/Counter
TCNTn
= 0
= 0xFF
OCn
(Int.Req.)
Waveform
Generation
OCn
=
OCRn
17.2.1
Registers
The Timer/Counter (TCNT2) and Output Compare Register (OCR2) are 8-bit registers. Interrupt
request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag
Register (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register
146
8160C–AVR–07/09
ATMEL [ ATMEL ]
