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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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ATmega48/88/168  
Power Management  
and Sleep Modes  
Sleep modes enable the application to shut down unused modules in the MCU, thereby  
saving power. The AVR provides various sleep modes allowing the user to tailor the  
power consumption to the application’s requirements.  
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one  
and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR  
Register select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-  
save, or Standby) will be activated by the SLEEP instruction. See Table 18 for a sum-  
mary. If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes  
up. The MCU is then halted for four cycles in addition to the start-up time, executes the  
interrupt routine, and resumes execution from the instruction following SLEEP. The con-  
tents of the Register File and SRAM are unaltered when the device wakes up from  
sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the  
Reset Vector.  
Figure 12 on page 24 presents the different clock systems in the ATmega48/88/168,  
and their distribution. The figure is helpful in selecting an appropriate sleep mode.  
Sleep Mode Control Register – The Sleep Mode Control Register contains control bits for power management.  
SMCR  
Bit  
7
6
5
4
3
2
1
0
SE  
R/W  
0
SM2  
R/W  
0
SM1  
R/W  
0
SM0  
R/W  
0
SMCR  
Read/Write  
Initial Value  
R
0
R
0
R
0
R
0
• Bits 7..4 Res: Reserved Bits  
These bits are unused bits in the ATmega48/88/168, and will always read as zero.  
• Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0  
These bits select between the five available sleep modes as shown in Table 18.  
Table 18. Sleep Mode Select  
SM2  
SM1  
SM0  
Sleep Mode  
Idle  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
ADC Noise Reduction  
Power-down  
Power-save  
Reserved  
Reserved  
Standby(1)  
Reserved  
Note:  
1. Standby mode is only recommended for use with external crystals or resonators.  
• Bit 0 – SE: Sleep Enable  
The SE bit must be written to logic one to make the MCU enter the sleep mode when the  
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is  
the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one  
just before the execution of the SLEEP instruction and to clear it immediately after wak-  
ing up.  
35  
2545D–AVR–07/04  
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