ATmega8U2/16U2/32U2
Table 10-6. Watchdog Timer Prescale Select, DIV = 3 (CLKwdt = CLK128 / 7) (Continued)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
VCC = 5.0V
VCC = 5.0V
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
Reserved
Table 10-7. Watchdog Timer Prescale Select, DIV = 4 (CLKwdt = CLK128 / 9)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
VCC = 5.0V
V
CC = 5.0V
144 ms
288 ms
576 ms
1.15 s
2.3 s
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2K (2048) cycles
4K (4096) cycles
72ms
144 ms
288 ms
576 s
8K (8192) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
1024K (1048576) cycles
1.1 s
2.3 s
4.6 s
4.6 s
9.2 s
9.2 s
18.4s
18.4 s
36.8 s
36.8 s
73 s
Reserved
61
7799D–AVR–11/10