ATmega8U2/16U2/32U2
11. Interrupts
11.1 Overview
This section describes the specifics of the interrupt handling as performed in
ATmega8U2/16U2/32U2. For a general explanation of the AVR interrupt handling, refer to
“Reset and Interrupt Handling” on page 13.
11.2 Interrupt Vectors in ATmega8U2/16U2/32U2
Table 11-1. Reset and Interrupt Vectors
Vector
No.
Program
Address(2)
Source
Interrupt Definition
External Pin, Power-on Reset, Brown-out Reset,
Watchdog Reset, USB Reset and debugWIRE AVR
Reset
1
$0000(1)
RESET
2
$0002
$0004
$0006
$0008
$000A
$000C
$000E
$0010
$0012
$0014
$0016
$0018
$001A
$001C
$001E
$0020
$0022
$0024
$0026
$0028
$002A
$002C
$002E
$0030
$0032
INT0
External Interrupt Request 0
External Interrupt Request 1
External Interrupt Request 2
External Interrupt Request 3
External Interrupt Request 4
External Interrupt Request 5
External Interrupt Request 6
External Interrupt Request 7
Pin Change Interrupt Request 0
Pin Change Interrupt Request 1
USB General Interrupt request
USB Endpoint Interrupt request
Watchdog Time-out Interrupt
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Compare Match C
Timer/Counter1 Overflow
3
INT1
4
INT2
5
INT3
6
INT4
7
INT5
8
INT6
9
INT7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
PCINT0
PCINT1
USB General
USB Endpoint
WDT
TIMER1 CAPT
TIMER1 COMPA
TIMER1 COMPB
TIMER1 COMPC
TIMER1 OVF
TIMER0 COMPA
TIMER0 COMPB
TIMER0 OVF
SPI, STC
Timer/Counter0 Compare Match A
Timer/Counter0 Compare match B
Timer/Counter0 Overflow
SPI Serial Transfer Complete
USART1 Rx Complete
USART1 RX
USART1 UDRE
USART1TX
USART1 Data Register Empty
USART1 Tx Complete
64
7799D–AVR–11/10
ATMEL [ ATMEL ]
