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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
Table 11-1. Reset and Interrupt Vectors (Continued)  
Vector  
No.  
Program  
Address(2)  
Source  
Interrupt Definition  
27  
28  
29  
$0034  
$0036  
$0038  
ANALOG COMP  
EE READY  
SPM READY  
Analog Comparator  
EEPROM Ready  
Store Program Memory Ready  
Notes: 1. When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at  
reset, see “Memory Programming” on page 246.  
2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot  
Flash Section. The address of each Interrupt Vector will then be the address in this table  
added to the start address of the Boot Flash Section. Moreover, contrary to other 8K/16K  
devices, the interrupt vectors spacing remains identical (2 words) for both 8KB and 16KB  
versions.  
Table 11-2 shows reset and Interrupt Vectors placement for the various combinations of  
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the Interrupt  
Vectors are not used, and regular program code can be placed at these locations. This is also  
the case if the Reset Vector is in the Application section while the Interrupt Vectors are in the  
Boot section or vice versa.  
Table 11-2. Reset and Interrupt Vectors Placement(1)  
BOOTRST  
IVSEL  
Reset Address  
0x0000  
Interrupt Vectors Start Address  
0x0002  
1
1
0
0
0
1
0
1
0x0000  
Boot Reset Address + 0x0002  
0x0002  
Boot Reset Address  
Boot Reset Address  
Boot Reset Address + 0x0002  
Note:  
1. The Boot Reset Address is shown in Table 23-8 on page 239. For the BOOTRST Fuse “1”  
means unprogrammed while “0” means programmed.  
11.2.1  
Moving Interrupts Between Application and Boot Space  
The General Interrupt Control Register controls the placement of the Interrupt Vector table.  
11.3 Register Description  
11.3.1  
MCUCR – MCU Control Register  
Bit  
7
6
5
4
3
2
1
IVSEL  
R/W  
0
0
IVCE  
R/W  
0
0x35 (0x55)  
Read/Write  
Initial Value  
JTD  
R/W  
0
PUD  
R/W  
0
MCUCR  
R
0
R
0
R
0
R
0
• Bit 1 – IVSEL: Interrupt Vector Select  
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash  
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot  
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-  
mined by the BOOTSZ Fuses. Refer to the section “Memory Programming” on page 246 for  
details. To avoid unintentional changes of Interrupt Vector tables, a special write procedure must  
be followed to change the IVSEL bit:  
65  
7799D–AVR–11/10  
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