ATmega8U2/16U2/32U2
Table 10-9. Watchdog Timer Prescale Select, DIV = 6(CLKwdt = CLK128 / 13) (Continued)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
VCC = 5.0V
VCC = 5.0V
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
Reserved
Table 10-10. Watchdog Timer Prescale Select, DIV = 7 (CLKwdt = CLK128 / 15)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
V
CC = 5.0V
120 ms
240 ms
480 ms
0.960 s
1.92 s
3.8 s
V
CC = 5.0V
240 ms
480 ms
960 ms
1.9 s
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2K (2048) cycles
4K (4096) cycles
8K (8192) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
1024K (1048576) cycles
3.8 s
7.6 s
7.6 s
15.3 s
30.7 s
61.4 s
122 s
15.3 s
30.7 s
61.4 s
Reserved
63
7799D–AVR–11/10