ATmega8U2/16U2/32U2
Table 10-5. Watchdog Timer Prescale Select, DIV = 2 (CLKwdt = CLK128 / 5)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
VCC = 5.0V
V
CC = 5.0V
160 ms
320 ms
640 ms
1.25 s
2.5 s
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2K (2048) cycles
4K (4096) cycles
80 ms
160 ms
320 ms
0.625 s
1.25 s
2.5 s
8K (8192) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
1024K (1048576) cycles
5 s
5 s
10 s
10 s
20 s
20 s
40 s
40 s
80 s
Reserved
Table 10-6. Watchdog Timer Prescale Select, DIV = 3 (CLKwdt = CLK128 / 7)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
V
CC = 5.0V
112 ms
224 ms
448 ms
0.875 s
1.75 s
3.5 s
V
CC = 5.0V
224 ms
448 ms
896 ms
1.75 s
3.5 s
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
2K (2048) cycles
4K (4096) cycles
8K (8192) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
1024K (1048576) cycles
7 s
7 s
14 s
14 s
28 s
28 s
56 s
56 s
112 s
60
7799D–AVR–11/10