ATmega8U2/16U2/32U2
Table 10-3. Watchdog Timer Prescale Select, DIV = 0 (CLKwdt = CLK128 / 1) (Continued)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
VCC = 5.0V
VCC = 5.0V
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
Reserved
Table 10-4. Watchdog Timer Prescale Select, DIV = 1 (CLKwdt = CLK128 / 3)
Watchdog
Reset/Interrupt Typical
Time-out at
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
WDP3
WDP2
WDP1
WDP0
V
CC = 5.0V
48 ms
96 ms
192 ms
0.375 s
0.75 s
1.5 s
V
CC = 5.0V
96 ms
192 ms
384 ms
0.75 s
1.5 s
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2K (2048) cycles
4K (4096) cycles
8K (8192) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
1024K (1048576) cycles
3 s
3 s
6 s
6 s
12 s
12 s
24 s
24 s
48 s
Reserved
59
7799D–AVR–11/10