ATmega169P
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table
16-6.
Table 16-6. Clock Select Bit Description
CS22
CS21
CS20
Description
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
No clock source (Timer/Counter stopped).
clkT2S/(No prescaling)
clkT2S/8 (From prescaler)
clkT2S/32 (From prescaler)
clkT2S/64 (From prescaler)
clkT2S/128 (From prescaler)
clkT S/256 (From prescaler)
2
clkT S/1024 (From prescaler)
2
16.10.2 TCNT2 – Timer/Counter Register
Bit
7
6
5
4
3
2
1
0
(0xB2)
TCNT2[7:0]
TCNT2
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a compare match between TCNT2 and the OCR2A Register.
16.10.3 OCR2A – Output Compare Register A
Bit
7
6
5
4
3
2
1
0
(0xB3)
OCR2A[7:0]
OCR2A
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
155
8018A–AVR–03/06
ATMEL [ ATMEL ]
