For OUT endpoint, it indicates the number of busy bank(s) filled by OUT transaction from the
host.
00b All banks are free
01b 1 busy bank
10b 2 busy banks
11b Reserved.
Bit
7
-
6
-
5
-
4
-
3
-
2
1
0
0
CTRLDIR
R
CURRBK1:0
R
UESTA1X
Read/Wri
te
R
R
R
R
R
Initial
Value
0
0
0
0
0
0
0
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2 - CTRLDIR - Control Direction (Flag, and bit for debug purpose)
Set by hardware after a SETUP packet, and gives the direction of the following packet:
- 1 for IN endpoint
- 0 for OUT endpoint.
Can not be set or cleared by software.
• 1-0 - CURRBK1:0 - Current Bank (all endpoints except Control endpoint) Flag
Set by hardware to indicate the number of the current bank:
00b Bank0
01b Bank1
1xb Reserved.
Can not be set or cleared by software.
Bit
7
6
5
4
3
2
1
0
FIFOCON
NAKINI
R/W
RWAL
R/W
NAKOUTI
R/W
RXSTPI
R/W
RXOUTI
R/W
STALLEDI TXINI
UEINTX
Read/Wri R/W
te
R/W
R/W
Initial
Value
0
0
0
0
0
0
0
0
• 7 - FIFOCON - FIFO Control Bit
For OUT and SETUP Endpoint:
Set by hardware when a new OUT message is stored in the current bank, at the same time than
RXOUT or RXSTP.
Clear to free the current bank and to switch to the following bank. Setting by software has no
effect.
216
AT90USB82/162
7707D–AVR–07/08
ATMEL [ ATMEL ]
