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90USB82-16MU 参数 Datasheet PDF下载

90USB82-16MU图片预览
型号: 90USB82-16MU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8 / 16K字节 [8-bit Microcontroller with 8/16K Bytes of ISP Flash]
分类和应用: 微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 306 页 / 2299 K
品牌: ATMEL [ ATMEL ]
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AT90USB82/162  
For IN Endpoint:  
Set by hardware when the current bank is free, at the same time than TXIN.  
Clear to send the FIFO data and to switch the bank. Setting by software has no effect.  
• 6 - NAKINI - NAK IN Received Interrupt Flag  
Set by hardware when a NAK handshake has been sent in response of a IN request from the  
host. This triggers an USB interrupt if NAKINE is sent.  
Shall be cleared by software. Setting by software has no effect.  
• 5 - RWAL - Read/Write Allowed Flag  
Set by hardware to signal:  
- for an IN endpoint: the current bank is not full i.e. the firmware can push data into the FIFO,  
- for an OUT endpoint: the current bank is not empty, i.e. the firmware can read data from the  
FIFO.  
The bit is never set if STALLRQ is set, or in case of error.  
Cleared by hardware otherwise.  
This bit shall not be used for the control endpoint.  
• 4 - NAKOUTI - NAK OUT Received Interrupt Flag  
Set by hardware when a NAK handshake has been sent in response of a OUT/PING request  
from the host. This triggers an USB interrupt if NAKOUTE is sent.  
Shall be cleared by software. Setting by software has no effect.  
• 3 - RXSTPI - Received SETUP Interrupt Flag  
Set by hardware to signal that the current bank contains a new valid SETUP packet. An inter-  
rupt (EPINTx) is triggered (if enabled).  
Shall be cleared by software to handshake the interrupt. Setting by software has no effect.  
This bit is inactive (cleared) if the endpoint is an IN endpoint.  
• 2 - RXOUTI / KILLBK - Received OUT Data Interrupt Flag  
Set by hardware to signal that the current bank contains a new packet. An interrupt (EPINTx) is  
triggered (if enabled).  
Shall be cleared by software to handshake the interrupt. Setting by software has no effect.  
Kill Bank IN Bit  
Set this bit to kill the last written bank.  
Cleared by hardware when the bank is killed. Clearing by software has no effect.  
See page 205 for more details on the Abort.  
• 1 - STALLEDI - STALLEDI Interrupt Flag  
Set by hardware to signal that a STALL handshake has been sent, or that a CRC error has been  
detected in a OUT isochronous endpoint.  
Shall be cleared by software. Setting by software has no effect.  
217  
7707D–AVR–07/08  
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