AT8xC51SND2C
Table 110. Dac Mixer Control Register - DAC_MC (08h)
7
6
5
4
3
2
1
0
-
-
INVR
INVL
RMSMIN2
RMSMIN1
LMSMIN2
LMSMIN1
Bit
Bit
Mnemonic Description
Number
7:6
-
Not used
Right channel mixer output invert
Set to enable. Clear to disable.
5
4
3
2
1
0
INVR
Left channel mixer output invert.
Set to enable. Clear to disable.
INVL
Right Channel Mono/Stereo Mixer Right Mixed input enable
Set to enable. Clear to disable.
RMSMIN2
RMSMIN1
LMSMIN2
LMSMIN1
Right Channel Mono/Stereo Mixer Left Mixed input enable
Set to enable. Clear to disable.
Left Channel Mono/Stereo Mixer Right Mixed input enable
Set to enable. Clear to disable.
Left Channel Mono/Stereo Mixer Left Mixed input enable
Set to enable. Clear to disable.
Reset Value = 00001001b
Table 111. DAC Mixer Control Register - DAC_CSFC (09h)
7
6
5
4
3
2
1
0
-
-
-
OVRSEL
-
-
-
-
Bit
Bit
Mnemonic Description
Number
7:5
-
Not used
Master clock selector
Clear for 256 x Fs.
Set for 384 x Fs.
4
OVRSEL
-
3:0
Not Used
Reset Value = 00000000b
95
4341D–MP3–04/05
ATMEL [ ATMEL ]
